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0.5 ?, cmos, 1.8 v to 5.5 v , 2:1 mux/spdt switch data sheet adg819 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2002 C 2012 analog devices, inc. all rights reserved. features low o n r esistance : 0.8 m ax imum at 125c 0.25 maximum o n r esistance f latness 1.8 v to 5.5 v s ingle s upply 200 ma c urrent c arrying c apability automotive t emperature r ange: C 40 c to +125c rail - to - r ail o peration 6 - l ead sot - 23, 8 - l ead msop , and 6 - b all wlcsp packages fast switching t imes typical p ower c onsumption (<0.01 w) ttl - /cmos - compatible i nputs pin c ompatible with the adg7 19 applications power r outing battery - p owered s ystems communication s ystems data a cquisition s ystems cellular p hones modems pcmcia c ards hard d rives relay r eplacement functional block dia gram figure 1. general description the adg819 is a monolithic, cmos, single - pole, double - throw ( spdt ) switch. this switch is designed on a submicron process that provides low power dissipation yet gives high switching speed, low on resistan ce, and low leakage currents. low power consumption and an operating supply range of 1.8 v to 5.5 v make the adg819 ideal for battery - powered, portable instruments. each switch of the adg819 conducts equally well in both directions when on. the adg819 exhibits break - before - make switching action, thus preventing momentary shorting when switching channels. the adg819 is available in a 6 - lead sot - 23 package , an 8 - lead msop package , and in a 6 - ball wlcsp package. this chip occupies only a 1.14 mm 2.18 mm area, making it the ideal candidate for space - constrained applicat ions. product highlights 1. ve r y low on resistance, 0.5 typical . 2. 1.8 v to 5.5 v single - supply operation . 3. high current carrying capability . 4. tiny 6 - lead sot - 23, 8 - lead msop , and 6 - ball , 1.14 mm 2.18 mm wlcsp package s. s2 d s1 in adg819 switches shown for a logic 1 input 02801-001
adg819 data sheet rev. a | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 gene ral description ......................................................................... 1 product highlights ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maxim um ratings ............................................................ 5 esd caution ...................................................................................5 pin configurations and function descriptions ............................6 typical performance characteristics ..............................................7 test circuits ........................................................................................9 te rminology .................................................................................... 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 13 revision history 5 / 12 rev. 0 to rev. a updated format .................................................................. universal deleted adg 820 ................................................................ universal changes to general description .................................................... 1 changes to table 1 ............................................................................ 3 changes to table 2 ............................................................................ 4 change to wlcsp ja thermal impedance parameter, table 3 ................................................................................................ 5 added table 5 and table 6; renumbered sequentially ............... 6 deleted test circuit 6 ; renumbered sequentially ....................... 8 changes to figure 11 to figure 14 .................................................. 8 changes to terminology section .................................................. 11 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 13 5 /02 rev ision 0: initial version
data sheet adg819 rev. a | page 3 of 16 specifications v dd = 5 v 10%, gnd = 0 v , unless otherwise noted . table 1 . parameter 25c ? 40c to +85c C 40c to +125c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance , r on 1 0.5 typ v s = 0 v to v dd , i s = 100 ma; see figure 16 0.6 0.7 0. 8 max o n resistance match between channels , r on 1 0.06 typ v s = 0 v to v dd , i s = 100 ma 0.08 0.1 0.12 max o n resistance flatness , r flat(on) 1 0.1 typ v s = 0 v to v dd , i s = 100 ma 0.17 0.2 0.25 max leakage currents v dd = 5.5 v source off leakage , i s ( off ) 0.01 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v; see figure 17 0.25 3 10 na max channel on leakage , i d , i s ( on ) 0.01 na typ v s = v d = 1 v, or v s = v d = 4.5 v; see figure 18 0.25 3 25 na max digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max digital input capacitance , c in 5 pf typ dynamic characteristics 2 t on 35 ns typ r l = 50 , c l = 35 pf, v s = 3 v; see figure 19 45 50 55 ns max t off 10 ns typ r l = 50 , c l = 35 pf, v s = 3 v; see figure 19 16 18 21 ns max break - before - make time delay, t bbm 5 ns typ r l = 50 , c l = 35 pf, v s1 = v s2 = 3 v; see figure 20 1 ns min charge injection 20 pc typ v s = 2 .5 v, r s = 0 , c l = 1 nf; see figure 21 off isolation C 71 db typ r l = 50 , c l = 5 pf, f = 100 khz; see figure 22 channel -to - channel crosstalk C 72 db typ r l = 50 , c l = 5 pf, f = 100 khz; see figure 24 bandwidth , C 3 db 17 mhz typ r l = 50 , c l = 5 pf; see figure 23 c s ( off ) 80 pf typ f = 1 mhz c d , c s ( on ) 300 pf typ f = 1 mhz power requirements v dd = 5.5 v , digital i nputs = 0 v or 5.5 v i dd 0.001 a typ 1.0 2.0 a max 1 o n resistance parameters tested with i s = 10 ma. 2 guaranteed by design ; not subject to production test.
adg819 data sheet rev. a | page 4 of 16 v dd = 2.7 v to 3.6 v, gnd = 0 v , unless otherwise noted . table 2 . parameter 25c C 40c to +85c C 40c to +125c unit test conditions/comments analog switch analog signal range 0 v to v dd v o n resistance , r on 1 0. 7 typ v s = 0 v to v dd , i s = 100 ma; see figure 16 1.4 1.5 1.6 max o n resistance match between channels , r on 1 0.06 typ v s = 0 v to v dd , i s = 100 ma 0.1 3 0.1 3 max o n resistance flatness , r flat(on) 1 0. 25 typ v s = 0 v to v dd , i s = 100 ma leakage currents v dd = 3.6 v source off leakage , i s ( off ) 0.01 na typ v s = 3.3 v/1 v, v d = 1 v/3.3 v; see figure 17 0.25 3 10 na max channel on leakage , i d , i s ( on ) 0.01 na typ v s = v d = 1 v, or v s = v d = 3.3 v; see figure 18 0.25 3 25 na max digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max digital input capacitance , c in 5 pf typ dynamic characteristics 2 t on 40 ns typ r l = 50 , c l = 35 pf, v s = 1.5 v; see figure 19 60 6 5 70 ns max t off 10 ns typ r l = 50 , c l = 35 pf, v s = 1.5 v; see figure 19 16 18 21 ns max break - before - make time delay, t bbm 40 ns typ r l = 50 , c l = 35 pf, v s1 = v s2 = 1.5 v; see figure 20 1 ns min charge injection 1 0 pc typ v s = 1.5 v, r s = 0 , c l = 1 nf; see figure 21 off isolation ? 71 db typ r l = 50 , c l = 5 pf, f = 100 khz; see figure 22 channel -to - channel crosstalk ? 72 db typ r l = 50 , c l = 5 pf, f = 100 khz; see figure 24 bandwidth , C 3 db 17 mhz typ r l = 50 , c l = 5 pf; see figure 23 c s ( off ) 80 pf typ f = 1 mhz c d , c s ( on ) 300 pf typ f = 1 mhz power requirements v dd = 3.6 v , d igital inputs = 0 v or 3.6 v i dd 0.001 a typ 1.0 2.0 a max 1 on resistance parameters tested with i s = 10 ma. 2 guaranteed by design; not subject to production test.
data sheet adg819 rev. a | page 5 of 16 absolute maximum rat ings t a = 25c, unless otherwise noted table 3 . parameter rating v dd to gnd ? 0.3 v to +7 v analog inputs 1 ? 0.3 v to v dd + 0.3 v or 30 ma, w hichever o ccurs f irst digital inputs 1 ? 0.3 v to v dd + 0.3 v or 30 ma, w hichever o ccurs f irst peak current, s x or d 400 ma ( p ulsed at 1 ms, 10% d uty cycle m ax imum ) continuous current, s x or d 200 ma operating temperature range industrial ? 40c to +85c automotive ? 40c to +125c storage temperature range ? 65c to +150c junction temperature 150c msop ja thermal impedance 206c/w jc thermal impedance 44c/w sot - 23 (4 - layer board) ja thermal impedance 119c/w wlcsp (4 - layer board) ja thermal impedance 80 c/w lead temperature, soldering (10 sec) 300c ir reflow, peak temperature (<20 sec) 235c 1 overvoltages at in, s x , or d are clamped by internal diodes. current should be limited to the maximum ratings given. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification i s not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating can be applied at any one time. table 4 . truth table for the adg819 in switch s1 switch s2 0 on off 1 off on esd caution
adg819 data sheet rev. a | page 6 of 16 pin configuration s and function descrip tions figure 2. 6- lead sot - 23 pin configuration figure 3. 6- ball wlcsp pin configuration table 5 . 6 - lead sot - 23 and 6- ball wlcsp pin function descriptions pin no. sot - 23 wlcsp mneonic description 1 6 in logic control input. 2 5 v dd most positive power supply potential. 3 4 gnd ground (0 v) reference. 4 3 s1 source terminal. can be an input or output. 5 2 d drain terminal. can be an input or output. 6 1 s2 source terminal. can be an input or output. figure 4. 8 - lead msop pin configuration table 6 . 8 - lead msop pin function descriptions pin no. mneonic description 1 d drain terminal. can be an input or output. 2 s1 source terminal. can be an input or output. 3 gnd ground (0 v) reference. 4 v dd most positive power supply potential. 5 nc no connect. do not connect to this pin. 6 in logic control input. 7 nc no connect. do not connect to this pin. 8 s2 source terminal. can be an input or output. top view (not to scale) 6 2 5 4 1 3 adg819 s2 in d v dd s1 gnd 02801-002 top view (bumps at the bottom) not to scale s2 1 in 6 d 2 v dd 5 s1 3 gnd 4 adg819 02801-003 d top view (not to scale) 8 7 6 5 1 2 3 4 adg819 s2 nc s1 in gnd v dd nc nc = no connect 02801-004
data sheet adg819 rev. a | page 7 of 16 typical performance characteristics figure 5. o n resistance vs. v d , v s figure 6. o n resistance vs. v d , v s figure 7. leakage currents vs. temperature figure 8. o n resistance vs. v d , v s for different temperatures figure 9. o n resistance vs. v d , v s for different temperatures figure 10 . t on /t off times vs. temperature 0.2 1.0 0.9 0.8 t a = 25c v dd = 2.7v v dd = 3v v dd = 3.3v v dd = v dd = 4.5v 5v v dd = 5. 5v on resistance ( ?) 0.7 0.6 0.5 0.4 0.3 0.1 0 0 1 2 3 4 5 v d , v s (v) 02801-005 on resistance ( ?) 10 t a = 2 5 c v dd = 1.8v 9 8 7 6 5 4 3 2 1 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v d , v s (v) 02801-006 leakage currents (na) 10 v dd = 3v , 5v i d , i s (on) i s (off) 8 6 4 2 0 ?2 0 20 40 60 80 100 120 temperature (c) 02801-007 1.0 0.8 v dd = 3v t a = +85c t a = +125c t a = +25c t a = ?40c on resistance ( ?) 0.6 0.4 0.2 0 0 3.0 0.5 v d , v s (v) 2.5 2.0 1.5 1.0 02801-008 1.0 v dd = 5v 0.8 on resistance ( ?) 0.6 0.4 0.2 0 0 1 2 3 4 5 v d , v s (v) t a = +85c t a = +125c t a = +25c t a = ?40c 02801-009 50 t on v dd = 3v v dd = 5v t off v dd = 3v, 5v 40 time (ns) 30 20 10 0 temperature (c) 0 20 ?20 40 ?40 60 80 100 120 02801-010
adg819 data sheet rev. a | page 8 of 16 figure 11 . charge injection vs. v s (source voltage) figure 12 . off isolation vs. frequency figure 13 . crosstalk vs. frequency figure 14 . o n response vs. frequency figure 15 . logic threshold voltage vs. supply voltage 250 200 150 v dd = 3v v dd = 5v charge injection (pc) 100 50 0 ?50 ?100 ?150 ?200 0 v s (v) t a = 25c 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 02801-0 1 1 0 ?10 ?20 off isolation (db) ?30 ?40 ?50 ?60 ?70 ?80 ?90 0.1 1 2 frequency (mhz) v dd = 5v, 3v t a = 25c 02801-012 0.1 1 2 frequency (mhz) 0 crosstalk (db) ?20 ?50 ?70 ?80 ?90 ?10 ?30 ?40 ?60 02801-013 1 0 0.2 10 1 30 v dd = 3v, 5v t a = 25 c ?1 on response (db) ?2 ?3 ?4 ?5 ?6 frequency (mhz) 02801-014 logic threshold voltage (v) 1.8 rising falling 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 v dd (v) t a = 25c 0 1 2 3 4 6 5 02801-015
data sheet adg819 rev. a | page 9 of 16 t est circuits figure 16 . o n resistance figure 17 . off leakage figure 18 . on leakage figure 19 . switching times figure 20 . break - before - make time delay, t bbm figure 21 . charge injection i ds s d v1 r on = v1 / i ds v s 02801-016 s d i d (off) i s (off) v s v d 02801-017 nc v d s d i d (on) nc = no connect 02801-018 v dd r l 50 ? c l 35pf in gnd v dd 0.1 f v in 50% 90% 90% v out v s 50% t on t off 02801-019 v dd r l 50 ? c l 35pf in gnd v dd 0.1 f s2 s1 v in d v in 50% 50% 0v v s1 v out 90% 90% v out 0v v s2 t bbm t bbm 02801-020 v s c l 1nf in gnd v dd v dd v out sw off sw off sw off sw off sw on sw on q inj = c l v out v out v in v in r s v out 02801-022
adg819 data sheet rev. a | page 10 of 16 figure 22 . off isolation figure 23 . bandwidth figure 24 . channel - to - channel crosstalk in gnd v dd v dd 0.1 f 50 ? v in s d network analyzer v out r l 50 ? v s 50 ? v out off isolation = 20 log v s 02801-023 in gnd v dd v dd 0.1f v in s d network analyzer v out r l 50? v s 50? v out with switch insertion loss = 20 log v out without switch 02801-024 gnd v dd 0.1 f s2 s1 d in network analyzer v out r l 50 ? v s r 50 ? v dd 50 ? v out channel-to-channel crosstalk = 20 log v s 02801-025
data sheet adg819 rev. a | page 11 of 16 terminology r on ohmic r esistance between d an d s x . r on on r esistance m atch between a ny two c hannels, that is , r on max imum ? r on min imum . r flat(on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s ( off ) source l eakage c urrent with the s witch off . i d , i s ( on ) channel l eakage c urrent with the s witch on . v d (v s ) analog v oltage on terminal d and terminal s. v inl m aximum input voltage for logic 0. v inh minimum i nput v oltage for logic 1. i inl (i inh ) input c urrent of the d igital i nput. c s ( off ) off s witch source c apacitance. c d , c s ( on ) on s witch c apacitance. t on delay between applying the digital control input and the output switching on . t off delay between applying the digital control input and the output switching off . t bbm off time or on time measured between the 90% points of both switches when switching from one address state to another. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. channel -to - channel crosstalk a measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted si gnal coupling through an off switch. bandwidth frequency at which the output is attenuated by ? 3 db. on response frequency r esponse of the on s witch.
adg819 data sheet rev. a | page 12 of 16 outline dimensions figure 25 . 6- lead small outline transistor package [sot - 23] (rj - 6) dimensions shown in millimeters figure 26 . 8 - lead mini small outline package [msop] (rm - 8) dimensions shown in millimeters compliant to jedec standards mo-178-ab 10 4 0 s e a t i n g p l a n e 1 . 9 0 b s c 0 . 9 5 b s c 0 . 6 0 b s c 6 5 1 2 3 4 3 . 0 0 2 . 9 0 2 . 8 0 3 . 0 0 2 . 8 0 2 . 6 0 1 . 7 0 1 . 6 0 1 . 5 0 1 . 3 0 1 . 1 5 0 . 9 0 0 . 1 5 m a x 0 . 0 5 m i n 1 . 4 5 m a x 0 . 9 5 m i n 0 . 2 0 m a x 0 . 0 8 m i n 0 . 5 0 m a x 0 . 3 0 m i n 0 . 5 5 0 . 4 5 0 . 3 5 pin 1 indicator 12-16-2008-a compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifie r 15 max 0.95 0.85 0.75 0.15 0.05 10-07- 2009-b
data sheet adg819 rev. a | page 13 of 16 figure 27 . 6- ball wa fer level chip scale package [wlcsp] (cb - 6 - 1) dimensions shown in millimeters ordering guide model 1 notes temperature range package description package option branding 2 adg819bcbz - reel 3 C 40c to +85c 6 - ball wafer level chip package [wlcsp] cb -6 -1 sbc adg819bcbz - reel7 3 C 40c to +85c 6 - ball wafer level chip package [wlcsp] cb -6 -1 sbc adg819brm C 40c to +125c 8 - lead mini small outline package [msop] rm -8 snb adg819brm - reel C 40c to +125c 8 - lead mini small outline package [msop] rm -8 snb adg819brmz C 40c to +125c 8 - lead mini small outline package [msop] rm -8 sbc adg819brmz - reel7 3 C 40c to +125c 8 - lead mini small outline package [msop] rm -8 sbc adg819brt - 500rl7 3 C 40c to +125c 6 - lead small outline transistor package [sot -23] rj -6 snb adg819brt - reel7 3 C 40c to +125c 6 - lead small outline transistor package [sot -23] rj -6 snb adg819brtz - 500rl7 3 C 40c to +125c 6 - lead small outline transistor package [sot -23] rj -6 sbc adg819brtz - reel 3 C 40c to +125c 6 - lead small outline transistor package [sot -23] rj -6 sbc adg819brtz - reel7 3 C 40c to +125c 6 - lead small outline transistor package [sot -23] rj -6 sbc 1 z = rohs compliant part. 2 branding on these packages is limited to three characters due to space constraints. 3 contact factory for availability. 0.50 0.32 nom 0.32 0.59 2.38 2.18 1.98 1.34 1.14 0.94 0.67 0.57 0.47 0.50 bal l pitch 0.24 max coplanarit y 0.44 0.36 0.28 bal l a1 identifier t op view (bal l side down) bot t om view (bal l side up) sea ting plane a 1 2 b c 02-03-2012- a
adg819 data sheet rev. a | page 14 of 16 notes
data sheet adg819 rev. a | page 15 of 16 notes
adg819 data sheet rev. a | page 16 of 16 notes ? 2002 C 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d02801 - 0- 5/12(a)

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